Designer
India
Job Description
Designer
Bangalore, Karnataka
Job Summary
Candidates with 2 to 4 years experience is mandatory
Experience in RTL coding using Verilog/SV
Experience in design using Xilinx or Altera devices
Experience in using Vivado or Quartus
Key Responsibilities
Experience in supporting lab debug
Good understanding of FPGA debugging techniques
2 to 5 years experience in front end design
Skill Requirements
Experience in CDC/Linting/Tool Flow
Experience with ASIC/SoC development flow including synthesis/Timing Constraints development is preferred
Other Requirements
Experience in RTL Synthesis
Scripting experience is preferable
Information at a Glance