Job Summary
Key Responsibilities
2. Lead verification strategy and implementation with UVM, defining methodologies and best practices to achieve robust functional coverage and validation.
3. Direct design reviews and oversee critical decisions in SoC architecture, guiding technical direction and resolving high-impact issues.
4. Mentor and upskill team members in advanced SoC design, Verilog, UVM, and C/C++, promoting ongoing technical growth and risk mitigation.
5. Engage with stakeholders to gather business and technical requirements, translating them into actionable SoC design and verification strategies.
6. Evaluate and implement emerging technologies to future-proof solutions, ensuring alignment with client expectations and industry benchmarks.
Skill Requirements
2. Excellent knowledge of UVM-based verification methodologies for digital design validation.
3. Excellent technical leadership in architecting scalable and secure chip designs.
4. Advanced proficiency in synthesizing, simulating, and optimizing SoC systems using industry-standard EDA tools.
5. Excellent analytical skills for translating business goals into technical solutions and design strategies.
Other Requirements
2. Optional but valuable: ARM Accredited Engineer, IEEE Certified Professional in Chip Design.