Job Summary

The Senior Design Lead drive end-to-end DFT solutions for large-scale projects and manage team deliverables.

Key Responsibilities

Responsibilities:

• Collaborate with design engineers to incorporate DFT techniques throughout the design flow
• Develop and implement DFT strategies for achieving high test coverage and fault detection
• Utilize DFT tools (scan insertion, ATPG) to enhance the testability of digital circuits
• Write and maintain DFT test plans and reports
• Analyze test results and identify potential design issues
• Participate in design reviews and provide feedback on DFT feasibility
• Stay up-to-date with the latest advancements in DFT methodologies and tools

Skill Requirements

Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
• 4-10 years of experience in Design for Testability (DFT) or a related field (experience with ASIC/SoC design a plus)
• Basic understanding of digital design principles (combinational logic, sequential logic)
• Working knowledge of DFT concepts (scan insertion, ATPG, fault coverage)
• Familiarity with DFT tools and methodologies is a plus
• Ability to learn quickly and adapt to new technologies
• Strong analytical and problem-solving skills
• Excellent communication and collaboration skills to work effectively in a team environment

Other Requirements

1. Optional But Valuable Certifications: Certified Usability Analyst (Cua), Ux Design Professional Certificate, Or Equivalent Design Certifications.