Job Summary

Experience 

• 2.5 – 4.5 years of relevant industry experience in Analog/Mixed-Signal Layout Design. 

• Experience in one or more of the following domains:  

• Power Management 

• Data Converters 

• High-Speed Analog 

• IO Layout 

• Clocking Solutions 

• Custom IP Development.  

Key Responsibilities

• Design and own physical layouts for analog, mixed-signal, and custom digital blocks  

• Apply advanced floorplanning techniques to handle signal integrity, power grid design, and matching constraints. 

• Perform and debug DRC, LVS, and ERC checks to ensure 100% tape-out readiness. 

• Mitigate deep submicron effects by ensuring proper ESD protection, latch-up prevention, and EM/IR compliance. 

• Work closely with circuit designers to interpret specifications and resolve layout iterations.  

Skill Requirements

Process Nodes Experience 

Hands-on experience in one or more of the following technologies is preferred: 

• Intel Advanced Nodes 

• TSMC N16 / N7 / N5 / N3 

• Samsung Advanced Process Nodes 

• Global Foundries Technologies 

• Any BCD or Bi-CMOS process nodes. 

Other Requirements

Scripting 

• Basic programming or scripting skills in one of the below programming languages is highly preferred  

• SKILL / SHELL / PERL / TCL 

  EDA Tools 

• Layout Editor: Cadence Virtuoso / Synopsys Custom Compiler 

• Physical Verifications: Calibre / PVS / Assura / ICV  

 Education 

• B.Tech / M.Tech in Electrical or Electronics Engineering.