Job Summary

•  IC Package Design Engineer with 5+ years experienced
•  Experience with Cadence Advanced Package designer, IC Package Design experience with Cadence APD Layout tool
•  Good understanding of package/substrate design and package assembly rules related to flip chip designs.
•  Exposure to different package technologies such as MCM, flip chip / wire bond, 3D, 2.5D etc., added advantage
•  Expertise in High-Speed Complex Package and PCB designs with HDI, Blind and Buried Via technologies
•  Hands-on expertise with PCB designs involving High Speed Parallel Bus interfaces including DDR, LPDDR, GDDR and HSIO interfaces including PCIe, SERDES.
•  Good Exposure to Stackup design, DFM, DFA rules and adherence.
•  Should have expertise in constraint setting in layout tool.

Key Responsibilities

1. To work closely with stakeholders to understand and refine design requirements.
2. To develop prototypes and proof-of-concept implementations to validate design decisions.
3. To mentor junior designers ,share knowledge and expertise through training sessions and documentation.
4. To collaborate with cross functional teams and other stakeholders to align software design with overall project goals.
5. To work with quality assurance teams to establish and maintain high-quality.

Skill Requirements

Cadence Allegro Package Designer (APD)

Package Layout Design
Probe Card Substrate Design

 

Other Requirements

Good Oral and Written communication skills