Job Summary
RTL build and prototyping on FPGA environment (Xilinx), Enable SW bringup on FPGA environment including support in debugging. Other than this most of the RTL skills will apply at a high level.
The Senior RTL Design Engineer plays a crucial role in delivering high-quality designs that align with project objectives and customer requirements. This role requires a strong understanding of RTL design principles and the ability to collaborate effectively with various stakeholders to refine design specifications, ensuring consistency and excellence in the overall design vision.
Key Responsibilities
2. Develop And Implement Prototypes And Proof-Of-Concept Designs Using Vhdl/Verilog, Validating Design Decisions Against Project Specifications.
3. Mentor And Guide Junior Designers By Sharing Knowledge And Expertise Through Structured Training Sessions And Comprehensive Documentation.
4. Work Closely With Cross-Functional Teams To Ensure That Rtl Design Integrates Seamlessly With Overall Project Architectures And Goals.
5. Partner With Quality Assurance Teams To Define Testing Plans And Methodologies, Ensuring The Delivery Of High-Quality Rtl Designs That Meet Industry Standards.
Skill Requirements
2. Proficient In Vhdl/Verilog For Digital Design And Simulation.
3. Familiarity With Fpga And Asic Design Flows And Tools.
4. Good Communication Skills To Interact Effectively With Stakeholders And Team Members.
Other Requirements
2. Optional But Valuable: Completion Of Relevant Training Courses In Digital Design And Verification Methodologies.