Job Summary
- 10-15 years of relevant industry experience in Analog/Mixed-Signal Circuit Design.
- Relevant industry experience in LPDDR Memory Interface Design and Architecture.
- Deep expertise in LPDDR5/LPDDR6 architecture, protocol, PHY, controller, training, calibration, and low-power operation.
- Proven experience defining interface specifications and driving implementation from architecture through silicon validation.
- Strong knowledge of JEDEC compliance, timing closure, signal and power integrity, package/board interactions, and performance optimization.
- Ability to guide RTL, analog/mixed-signal, verification, physical design, firmware, and validation teams through complex issue resolution.
- Expected to lead technical reviews, customer discussions, risk assessment, debug strategy, and mentoring of engineering teams.
Key Responsibilities
- Debug simulation and convergence issues.
- Identify root causes of functional and performance failures.
- Perform design iterations to meet specification targets.
- Support sign-off activities including reliability and electrical checks where applicable.
Skill Requirements
- Cadence Virtuoso Schematic and Layout
• Spectre/AFS/Hspice - ADE Assembler
- Voltus/Totem
- Layout extraction flow knowledge is good to have
- Digital design tools knowledge is good to have
Other Requirements
Hands-on experience in one or more of the following technologies is preferred:
180nm,130nm,90nm, 40nm