Job Summary

This role oversees technical execution and delivery within emulation projects, providing hands-on guidance and solutions to ensure effective completion of project tasks. The individual applies solid technical judgment in emulation workflows, advocates best practices, and supports team members in enhancing their skills and productivity. They are accountable for process adherence, technical feasibility assessments, and risk mitigation across assigned modules.

Key Responsibilities

1. Provide technical solutions using emulation platforms such as Cadence Palladium or Synopsys ZeBu, ensuring adherence to established best practices and coding standards for optimized project delivery.
2. Guide team members in developing and debugging hardware models utilizing SystemVerilog and C/C++ for accurate emulation, fostering technical growth and productivity within the team.
3. Ensure process compliance in emulation testbench creation and execution, participating in technical reviews to evaluate feasibility, alternatives, and architectural risks using relevant emulation tools.
4. Prepare and submit detailed status reports leveraging project tracking systems, proactively identifying and minimizing technical risks or resolving escalations within project modules.

Skill Requirements

1. Solid proficiency in emulation technologies, including Cadence, Synopsys, or Mentor platforms.
2. In-depth knowledge of SystemVerilog, C/C++, and related modeling languages for hardware emulation.
3. Strong understanding of emulation workflows, including testbench development, hardware debugging, and performance optimization.
4. Experience in implementing process compliance and technical best practices within emulation projects.
5. Ability to assess technical feasibility, risks, and alternatives using emulation tools and methodologies.

Other Requirements

1. Optional but valuable certifications: Cadence Palladium Certification, Synopsys ZeBu Certification, or similar vendor-specific emulation credentials.